 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| PLL701-31 Low EMI Spread Spectrum Multiplier Clock FEATURE * * * * * * * * * Spread Spectrum Clock Generator with 1x outputs. Output frequency ranges: 10MHz to 30MHz. Accepts input from crystal or reference clock. Selectable Center, Down or Asymmetric Spread Modulation. Selectable Modulation magnitude. TTL/CMOS compatible outputs. 3.0V (+/-10%) Supply Voltage. Low short-term jitter. Available in 8-Pin 150mil SOIC. PIN CONFIGURATION XIN/FIN XOUT/SD*^ SC0^ SC1^ 1 8 VDD SC2^ FOUT GND PLL701-31 2 3 4 7 6 5 XIN/FIN = 10 ~ 30 MHz Note: ^: Internal pull-up resistor (120k for SD, 30 k for SC0-SC2). *: The value of SD is latched upon power-up. The internal pull-up resistor results in a default high value when no pull-down resistor is connected to this pin (recommended external pull-down resistor of 27 k). DESCRIPTION The PLL701-31 is a Spread Spectrum Clock Generator designed to reduce EMI in high-speed digital systems. The device is designed to operate from a crystal or reference clock input and provides a 1x modulated clock output. Center, Down and Asymmetric spread types are selectable as well as the modulation magnitude. OUTPUT CLOCK SELECTION SST Modulation SD 0 1 1 1 1 1 0 0 0 0 SC2 1 0 0 1 1 1 0 0 0 0 SC1 1 0 1 0 0 1 0 0 1 1 SC0 Magnitude 0 1 0 0 1 0 0 1 0 1 3.75% 3.50% 3.75% 3.25% 3.50% 3.75% 3.25% 3.50% 3.75% 0.00% Fin / 512 Freq. D D A D A A C C C Type -3.75% -3.50% +0.125%, -3.625% -3.25% +0.125%, -3.375% +0.25%, -3.5% +/-1.625 % +/-1.75% +/-1.875% SST OFF Notes: A: Asymmetric Spread. D: Down Spread. C: Center Spread. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/28/05 Page 1 PLL701-31 Low EMI Spread Spectrum Multiplier Clock BLOCK DIAGRAM XIN/FIN XOUT XTAL OSC PLL SST FOUT SC(0:2) SD Control Logic PIN DESCRIPTIONS Name XIN/FIN XOUT/SD SC0 SC1 SC2 VDD FOUT GND Number 1 2 3 4 7 8 6 5 Type I B I I I P O P Description Crystal input to be connected to fundamental parallel mode crystal.(CL=18pF) or clock input. At power-up, this pin is an input pin to select modulation magnitude and type. After input sampling, this pin is crystal output. Has internal pull up resistor. Digital control input to select modulation magnitude and type. Has internal pull-up. Digital control input to select modulation magnitude and type. Has internal pull-up. Digital control input to select modulation magnitude and type. Has internal pull-up. 3.0(+/-10%)V Power Supply. Modulated Clock Frequency Output. Ground. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/28/05 Page 2 PLL701-31 Low EMI Spread Spectrum Multiplier Clock FUNCTIONAL DESCRIPTION Selectable spread spectrum modulation types and magnitudes The PLL701-31 provides selectable spread spectrum modulation type, as well as selectable modulation magnitude. Selection is made by connecting specific pins to a logical "zero" or "one", according to the output clock selection table on page 1. In order to reduce the number of pins on the chip, the PLL701-31 uses pin 2 (XOUT/SD) as a bi-directional pin. The pin serves as a modulation type and magnitude selector input (SD) upon power-up (see output clock selection table on page 1), and as XOUT crystal connection as soon as the input has been latched. Pins 3 (SC0), 4 (SC1), and 7 (SC2) are used as inputs to complete the spread spectrum modulation type and magnitude selection as shown on the output clock selection table (page 1). Connecting a selection pin to a logical "one" All selection pins have an internal pull-up resistor (30k for pins 3, 4, 7, and 120k for pin 2). This internal pullup resistor will pull the input value to a logical "one" by default, i.e. when no connection is made between the pin and GND. No external pull-up resistor is therefore required for connecting a logical "one" upon power-up. Connecting a selection pin to a logical "zero" For an input only pin, i.e. pins 3 (SC0), 4 (SC1), and 7 (SC2), the pin simply needs to be grounded to pull the input down to a logical "zero". Pin 2 (XOUT/SD) should be connected to GND thru a 27k resistor to select a logical "zero". ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS Supply Voltage Input Voltage, dc Output Voltage, dc Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) ESD Protection, Human Body Model SYMBOL VDD VI VO TS TA TJ MIN. -0.5 -0.5 -65 -40 MAX. 4.6 VDD+0.5 VDD+0.5 150 85 125 260 2 UNITS V V V C C C C kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/28/05 Page 3 PLL701-31 Low EMI Spread Spectrum Multiplier Clock 2. DC/AC Specifications PARAMETERS Supply Voltage Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage Output Low Voltage Input Frequency Maximum interruption of FIN Load Capacitance Pull-up Resistor Pull-up Resistor Short Circuit Current 3.3V Dynamic Supply Current CL Rup Rup Isc ICC SYMBOL VDD VIH VIL IIH IIL VOH VOL FXIN FIN CONDITIONS MIN. 2.7 0.7* VDD TYP. 3.0 MAX. 3.3 0.3* VDD 100 100 UNITS V V V A A IOH=5mA, VDD =3.3V IOL=6mA, VDD =3.3V When using a crystal When using reference clock When using reference clock Between Pin XIN and XOUT* PIN 2 PIN 3, 4, 7 No Load 2.4 10 10 18 120 30 50 18 0.4 30 30 100 MHz MHz s pF k k mA mA *Note: Pin XIN and XOUT each has a 36pF capacitance. When used with a XTAL, the two capacitors combined load the crystal with 18pF. If driving XIN with a reference clock signal, the load capacitance will be 36pF (typical). 3. Timing Characteristics PARAMETERS Rise Time Fall Time Output Duty Cycle Cycle to Cycle Jitter Cycle to Cycle Jitter SYMBOL Tr Tf DT Tcyc-cyc Tcyc-cyc CONDITIONS Measured at 0.8V ~ 2.0V @ 3.3V Measured at 2.0V ~ 0.8V @ 3.3V FOUT=48MHz @ 3.3V FOUT=72MHz @ 3.3V MIN. 0.8 0.78 45 TYP. 0.95 0.85 50 MAX. 1.1 0.9 55 100 100 UNITS ns ns % ps ps 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/28/05 Page 4 PLL701-31 Low EMI Spread Spectrum Multiplier Clock PACKAGE INFORMATION 8 PIN Narrow SOIC ( mm ) SOIC Symbol A A1 B C D E H L e Min. 1.47 0.10 0.33 0.19 4.80 3.80 5.80 0.38 1.27 BSC Max. 1.73 0.25 0.51 0.25 4.95 4.00 6.20 1.27 A1 B C L e E H D A ORDERING INFORMATION For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL701-31 S C X X PART NUMBER NONE= TUBE R= TAPE AND REEL NONE= NORMAL PACKAGE L= GREEN PACKAGE PACKAGE TYPE S=SOIC TEMPERATURE C=COMMERCIAL I=INDUSTRIAL Order Number PLL701-31SC PLL701-31SC-R PLL701-31SCL PLL701-31SCL-R Marking P701-31SC P701-31SC P701-31SCL P701-31SCL Package Option SOIC-Tube SOIC-Tape and Reel SOIC-Tube (GREEN) SOIC-Tape and Reel (GREEN) PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/28/05 Page 5 |
Price & Availability of PLL701-31SIR
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |